Result of a small effort

1. Napatech SmartNICs은 아래 Time Sync. 연결 방법을 지원한다. 
   Napatech Intel PAC의 경우 OS Time만 지원된다.
   
   [ Napatech SmartNICs ]
   Time Synchronization 
   • IEEE 1588-2008 PTP V2 
   • PPS 
   • OS time 
   [ Napatech Intel PAC ]
   • OS time 
   
   

2. Napatech Intel PAC의 경우 Multi-CPU Distribution에서 64개의 Rx Stream만을 지원하고  지원하고, Napatech SmartNICs의 경우 128개의 Rx Stream과 QPI Bypass, 4x10G Socket Load balancing 기능을 지원한다.
   
   [ Napatech SmartNICs ]
   Intelligent Multi-CPU Distribution
   • Configurable flow distribution over 128 Rx streams
   • QPI bypass for 2 x 100G performance solution
   • 4 x 10G socket load balancer
   [ Napatech Intel PAC ]
   Intelligent Multi-CPU Distribution
   • Configurable flow distribution over 64 Rx streams
   
   

3. In-Line 기능에 대해서는 Napatech SmartNICs만 지원한다. Napatech Intel PAC의 경우 Transmission기능이 지원되기는 하나 Host-based Transmission/Local Retransmission 기능만 지원한다.
   
   [ Napatech SmartNICs ] 
   In-Line Application Support 
   • Supports multi-core processing with up to 128 Rx/Tx streams per SmartNIC
   • Zero copy transfer from Rx to Tx 
   • Single bit flip to select packet discard or packet forward
   
   

4. Napatech Intel PAC의 경우 FPGA Temp. 및 software shutdown에 대한 monitoring만 지원된다.
   
   [ Napatech SmartNICs ]
   MONITORING SENSORS Sensors on the Napatech SmartNICs provide extensive monitoring of:
   • PCB temperature level with alarm
   • FPGA temperature level with alarm and automatic shutdown
   • Temperature of critical components
   • Individual optical port temperature or light level with alarm
   • Voltage or current overrange with alarm
   • Cooling fan speed with alarm
   • Ethernet link status per port
   • Status and loss of time synchronization
   [ Napatech Intel PAC ]
   Sensors on the Intel® PAC A10 GX provide monitoring of FPGA temperature level with alarm and software shutdown
   
   

5. Napatech SmartNICs은 1G, 10G and 40G and 100G port speeds 를 지원하지만, Napatech Intel PAC의 경우 10G and 40G port speeds만을 지원한다.

* Intel PAC ( Programmable Acceleration Card) Hardware에 Napatech FPGA Solution과 Software 사용과 관련된 Spec. 자료입니다.

Image by courtesy of Intel

With the acquisition of Altera, Intel® has enabled the Programmable Acceleration Card (PAC) with Intel® Arria® 10 GX FPGA. This new card allows FPGA developers to create AFU (Accelerator Functional Units) that can be deployed on the card and bring FPGA-based value-add to the application.

The OPAE framework

Intel has developed a framework SDK – the Open Programmable Acceleration Engine (OPAE) – that operates with terms like blue and green bitstreams, using the colors to describe the internals of the Intel FPGA. The blue bitstreams are FPGA functional blocks delivered by Intel to make the card work. It contains IO logic for all the surrounding peripherals like PCI, SDRAM, and QSFP+. The green bitstream is where the user code (AFU) is located. The blue bitstream abstracts the IO via standardized APIs enabling the green bitstream to be easily ported to new blue bitstreams on other HW platforms.

Image by courtesy of Intel

The OPAE framework strives to ensure that the developer of an AFU only needs to concern him/herself with the AFU specifics and not the bring-up of the entire FPGA. The server application layer of the OPAE contains a driver layer giving the user access to acquire the FPGA, reset the FPGA, read/write to the FPGA, etc., all via standardized functions. The OPAE framework also provides functions like memory allocate, which can be seen both by the FPGA and the CPU.

The Napatech firmware is a green bitstream that interfaces with the blue bitstream components and enables the Napatech driver suite to interact with the Napatech firmware as if it were Napatech hardware. Normally, Napatech applies both blue and green bitstreams on its own hardware, so using only the green bitstream has been challenging, yet successful.

PAC Hardware

The PAC hardware consists of:

·         a QSFP+ enabling a single 40Gbps or 4x10Gbps (via breakout cables)

·         a Intel Arria 10 GX FPGA

·         8 GB DDR-4 memory

·         x8 PCIe (~50Gbps) host interface

·         flash to store the FPGA image

Image by courtesy of Intel

Napatech value-add

Napatech has a long history of creating its own SmartNICs, but with the collaboration between Intel and Napatech, it is now possible to buy an Intel FPGA based NIC and get Napatech software to run on this non-Napatech hardware. The Napatech software on the Intel hardware enables full 40Gbps zero packet loss RX/TX both on 4x10Gbps and 1x40Gbps. Besides zero packet loss, key Napatech features like deduplication, correlation key generation, flow matching, pattern match, etc. become available as does the highly flexible tuple matcher used for load distribution of traffic. Napatech has enabled the Intel card to work as a plug-n-play solution for several monitoring/security applications like Suricata, Snort, Bro as well as the TRex traffic generator which means that it is also integrated into DPDK when running the Napatech firmware.

Performance

With the Intel PAC running Napatech Software, Intel now has a hardware platform that can claim zero packet loss at 40Gbps, which to my knowledge has not previously been possible. We have been testing internally with both the PAC and Intel X710 – and only the PAC with Napatech Software can ensure zero packet loss. Running e.g. Suricata on X710, the packet loss starts to occur at ~ 1Gbps, but with the Intel PAC, it runs without loss at ~40Gbps.

Final thoughts

I see great potential for the PAC platform and OPAE going forward and look very much forward to seeing what use cases it will fulfill and how the platform will evolve. Hopefully the PAC will enable more FPGA business, both from a hardware and firmware perspective. I don’t think the current PAC is a one-fits-all platform, but it can be the catalyst to spin-off a general interest in FPGA and other form factor boards that all feature the OPAE to enable portability from an application point of view. And in the end, that is what matters: that the application is accelerated.

Intel’s next PAC with a Stratix 10 looks interesting and much more similar to the Napatech hardware products, so let’s see what the future brings.

출처 : https://www.napatech.com/intel-fpga-hardware-napatech-inside/

* Napatech Virtualization SmartNIC과 관련된 Hardware 자료입니다.

SmartNICs for Reconfigurable Computing

NT200B01
2-PORT 2x100G PCIe GEN3

THE NAPATECH NFV SmartNIC

Consolidate your network functions virtualization (NFV) performance with high-end technology designed specifically for NFV. The Napatech NFV SmartNIC is a common hardware platform that supports multiple SmartNIC solutions for virtualized environments. Based on a Xilinx UltraSCALE FPGA, the NFV SmartNIC is production-ready and can be reconfigured on-the-fly to support specific SmartNIC functionality.

Supporting from 1G to 100G data rates, the NFV SmartNIC is a versatile and flexible platform that can be used in multiple network locations. The programmability and reconfigurability of FPGAs can be exploited to extend the lifetime of the NFV SmartNIC and server hardware by allowing capacity, features and capabilities to be extended in line with data growth and new industry standards and demands.

Specific SmartNIC solutions are delivered as FPGA images that can be downloaded to the NFV SmartNIC to support the given application.

FEATURE HIGHLIGHTS

• Supports multiple solutions on-the-fly The re-configurable FPGA technology allows multiple SmartNIC solutions to be deployed on-the-fly.
• Supports multiple rates at various locations Designed to support multiple data rates including 8x10Gbps, 4x10Gbps, 8x25 Gbps, 2x40 Gbps, 2x50 Gbps and 2x100 Gbps.
• Extends hardware lifetime and improves TCO Can be upgraded on-the-fly with increased capacity, functionality and capabilities. This extends the lifetime of your infrastructure, reducing capital expenditure needs and operational costs.
• Enables centralized automation and management Facilitates centralized automation and management as it supports multiple virtual services, applications and functions using the same hardware platform.

NAPATECH-SmartNIC SOLUTIONS

Napatech SmartNIC solutions are designed specifically for virtual environments. Examples include:

• Open Virtual Switch (OVS) SmartNIC Solution Napatech OVS SmartNIC Solution enables full throughput data delivery to virtual functions with zero packet loss at high-speed, using only a single CPU core and without the need to bypass or fully offload the virtual switch to the NIC.
• Hardware SmartNIC Solutions Napatech Hardware SmartNIC Solutions provide common data processing services, such as encryption and compression, that can operate at high data line rates using only a single CPU core.

SPECIFICATIONS

GENERAL FEATURES
• Full line-rate processing for all frames from 64 bytes to 10,000 bytes - keep or discard erroneous frames
• IEEE standard: IEEE 802.3 2x100 Gbps Ethernet support
• Network interface: 2 × QSFP28 ports
• Supported QSFP28 modules:100GBASE-SR4 and 100GBASE-LR4
• Data rate: 2x100 Gbps
• Typical CPU load: < 5%
• Time formats: PCAP-ns/-µs and UNIX 10 ns
• Time stamp resolution: 1 ns
• Pluggable options for IEEE 1588-2008 PTP and PPS time synchronization

SmartNIC SOFTWARE
• Operating systems: Linux
• Napatech API for high performance and advanced features
• libpcap
• SDK tools included in source code for debugging and prototyping and as application examples

SmartNIC HARDWARE
• Bus type: 16-lane 8 GT/s PCIe Gen3*
• 5 GB onboard DDR4 RAM
• Flash: Support for two boot images
• Built-in thermal protection
• Physical dimensions: ½-length and low-profile PCIe
• Weight excluding pluggable modules:
• NT200B01: 455 g
• MTBF according to UTE C 80-810:
• NT200B01: TBD hours
• Power consumption including 2 x QSFP28: 
• NT200B01: max 75 Watts * To enable the throughput of 16-lane PCIe Gen3, the COTS server must support PCIe bifurcation.

ENVIRONMENT FOR NT200B01
• Operating temperature: 0 °C to 45 °C (32 °F to 113 °F)
• Operating humidity: 20% to 80%

REGULATORY APPROVALS AND COMPLIANCES
• Please contact Napatech for more information

* 2019-07-01 Napatech SmartNIC 제품군에 대한 내용입니다. 여기에 없는 제품은 아직 출시전이거나 단종된 제품으로 보시면 됩니다.
자세한 문의는 판매처로 문의하시기 바랍니다. 문서번역 카테고리에 보시면 한글 번역본도 있습니다.

Napatech Link SmartNIC Hardware

for Reconfigurable Computing

In a world of Reconfigurable Computing it is the software that defines the use case functionality, but the wrong choice of hardware can seriously limit the overall benefits and reliability of the solution.

Napatech’s LinkTM SmartNICs are designed to meet all the standards of modern servers, and with a rapidly changing world of Data Center and hyperscale deployments in mind.

PEACE OF MIND

The first thing on everybody’s mind when selecting a hardware solution is the question of reliability. Software can be patched if faulty, but hardware needs a physical replacement. You need to get it right the first time!

When Napatech is designing hardware, reliability is first and foremost in everything we do. Our customers need solutions that will support their use cases without worry. Our long-term loyal customer base proves this point.

KEEP YOUR COOL

The power of FPGA technology is only available if you can harness the power, and that takes cooling! In simple terms: The more you can cool, the more power you can burn, and the more functionality you can run on your LinkTM SmartNIC. This translates into real economical benefits, as you can fit more compute power into server rack space with a good cooling solution.

Napatech designs LinkTM SmartNICs with both active and passive cooling. The actively cooled solutions provide a 100% self-contained cooling solution with NO requirements for a specific server airflow. This solution exhales the majority of dissipated energy outside the server through front plate cutouts. This means that customers have the freedom to choose server designs without worrying about cooling capacity. To meet telecom requirements, the passively cooled solutions are NEBS-compliant.

GOOD VIBRATIONS

Modern servers have quick release PCI fastening mechanisms that allow for easy change of LinkTM SmartNICs. Unfortunately, some of these designs are exposing PCI cards to vibration in

 the slot during transportation. To make sure that the hardware survives this environment, Napatech hardware is designed to meet the highest standards.

STANDARDS OF EXCELLENCE

Understanding the in’s and out’s of modern servers starts with the standards, but continues into tackling the hard realities of compromises and exceptions made to fit a certain form factor or price point. The more the SmartNIC hardware adheres to established industry standards, the easier it will be for customers to integrate it in their solution.

Napatech is on the PCI-SIG integrators list as a testimony to Napatech’s efforts to make sure that our customers do not need to worry about the hardware, and can focus on their software solution.

LINK TO THE FUTURE

Napatech offers a whole range of FPGA software options for the LinkTM hardware, that address use cases within:

·                     Network Security

·                     Network Quality of Experience Assurance

·                     Network & Security Forensics

·                     Application Performance Management (APM)

·                     Network Test & Measurement

·                     Cyber Defense

·                     vSwitch Acceleration

·                     Virtual Network Monitoring

출처 : Napatech DN-0251_Product_Overview_Napatech_Link_SmartNIC_Hardware 문서

라즈베리 파이 3 B+ Model은 Broadcom BCM2837B0, Cortex-A53 64비트 프로세서가 1.4GHz에서 동작되는 SBC(단일 보드 컴퓨터)입니다. 라즈베리 파이 3 B+ Model은 PoE HAT를 통해 2.4GHz/5GHz 무선 LAN, Gigabit Ethernet, Bluetooth 4.2/BLE 및 PoE 기능을 제공합니다. 2.4GHz/5GHz 대역 무선 LAN에는 모듈식 적합성 인증이 포함되어 있습니다.
라즈베리 파이 3 B+ Model은 1GB LPDDR2 SDRAM 메모리, MIPI DSI 디스플레이 포트와 MIPI CSI 카메라 포트가 있습니다.
그리고, 40xGPIO, 4극 스테레오 오디오 출력, 2xUSB 2.0 등의 인터페이스를 가지고 있습니다.

Raspberry Pi 3 Model B+ 규격

Broadcom BCM2837B0, Cortex-A53 (ARMv8) 64-bit SoC @ 1.4GHz

1GB LPDDR2 SDRAM

2.4GHz and 5GHz IEEE 802.11.b/g/n/ac wireless LAN, Bluetooth 4.2, BLE

Gigabit Ethernet over USB 2.0 (maximum throughput 300 Mbps)

Extended 40-pin GPIO header

Full-size HDMI

4 USB 2.0 ports

CSI camera port for connecting a Raspberry Pi camera

DSI display port for connecting a Raspberry Pi touchscreen display

4-pole stereo output and composite video port

Micro SD port for loading your operating system and storing data

5V/2.5A DC power input

Power-over-Ethernet (PoE) support (requires separate PoE HAT)

출처 : https://www.seeedstudio.com/Raspberry-Pi-3-Model-B--p-3037.html

Raspberry Pi 3 Model B+ mechanical drawing

출처 : https://www.raspberrypi.org/products/raspberry-pi-3-model-b-plus/

Raspberry Pi hardware 자료 모음

https://www.raspberrypi.org/documentation/hardware/raspberrypi/README.md

YouTube Raspberry Pi 3 B+ 소개

아래 내용은 Napatech의 고성능 Packet Capture Card를 사용하기 위한 Software Package 설치에 필요한 사전 준비사항과 설치 방법에 대한 내용을 정리한 것입니다.

Installing the Napatech Linux Driver and the Tools

In this chapter

This chapter explains how to install the Napatech Linux Driver and the tools.
Compile and Install the Linux Driver and the Tools

Before you begin

For more information about supported versions of Linux, please refer to the relevant Release Summary.
The following are required in order to build and install the driver software:

·         Linux kernel development headers

·         GCC version 4.0 or later

·         GNU make

The following are required in order to build and install libpcap:

·         GCC version 4.0 or later

·         GNU make

·         flex and bison or lex and yacc. Some versions of lex are insufficient to compile libpcap;
         if this is the case, install flex and bison.

The following libraries are needed to run the tools:

·         glibc version 2.5 or later

·         ncurses version 5.0 or later (only applies to the monitoring and profiling tools)

Note: Root privileges are required for installing and compiling the Linux driver and the tools.

Steps

To install the Napatech Linux driver including libraries, tools, and optionally libpcap:

Procedure

1.       Download the product package from supportportal.napatech.com (the Napatech Support Portal).

2.       Unpack the product package.

$ tar xzf ntanl_package_3gd-x.y.z-linux.tar.gz
$ cd ntanl_package_3gd-x.y.z-linux

The unpacked product directory contains:

·         A PDF with product package release notes

·         readme_3gd-x.y.z.txt, describing the product package content

·         package_install_3gd-x.y.z.sh, a product package install script.

·         A documentation subdirectory.

·         A source_rpm subdirectory with sample source RPMs for the driver and tools components.

·         A subdirectory for each product package component, in general containing release notes and an installer file 
         for the component.

3.       Install the Napatech driver and tools in one of these ways:

·         By running the product package installer script package_install_3gd-x.y.z.sh, located in the root directory.
          This will install the driver software, the tools, documentation, FPGA images and imgctrl, and optionally a
          version of libpcap.

·         By running installer scripts for the individual components.

·         For the driver and tools packages, by building RPM packages from source RPM packages and installing the
          resulting RPM packages.

4.       Install by running the product package installer script:

$ sudo package_install_3gd-x.y.z.sh

If the product package installer script detects that a version of the driver software is already installed, you will be offered the choice between updating the existing installation, deleting the existing installation before commencing, or quitting the installation script.

You will be offered the option of installing a version of libpcap with Napatech extensions. For more information about libpcap with Napatech extensions, please refer to DN-0428.

5.       Alternatively, install by running individual component installer scripts:

a.            To compile and install the driver, execute the driver install script:

$ cd software
$ sudo nt_driver_3gd_linux-x.y.z-short-sha1.run

To get information about driver install script options,
run nt_driver_3gd_linux-x.y.z-short-sha1.run –help

For instance, the --installpath <directory> option allows you to select a user-defined installation directory instead of /opt/napatech3/.

b.           To install the tools, execute the tools install script:

$ cd tools
$ sudo nt_tools_3gd_linux-x.y.z-short-sha1.run

To get information about tools install script options, run nt_tools_3gd_linux-x.y.z-short-sha1.run --help

6.       Alternatively, for the driver and tools packages, by building RPM packages from source RPM packages and installing the resulting RPM packages. This process is described in Building and Installing RPM Packages for the Napatech Driver and Tools.

7.       Optionally, to list installed Napatech SmartNICs, run the imgctrl tool with root privileges:

$ sudo /opt/napatech3/bin/imgctrl –q

imgctrl v3.5.5.3-38534 (Sep 29 2017 08:15:04) (Logfile: /tmp/imgctrl.log)
Scanning for Napatech adapters..
Adapter 0:
     PCI SLOT        : 0000:00:09.0
     PCI DEVICE ID   : 0175
     PCI LANES       : x8
     ADAPTER TYPE    : NT20E3_2_PTP_NEBS PCI Express Gen3 2x10Gb SFP+ platform
. . .

imgctrl is a stand-alone tool for updating and controlling the FPGA firmware on Napatech SmartNICs. As a security measure, imgctrl will not run if the Napatech kernel mode driver is loaded.
Please refer to DN-0487 for more information about the imgctrl tool.

Results

The /opt/napatech3/ directory (or a user-defined one) including subfolders is created; and the driver is installed and compiled to match the target Linux kernel version.

출처 : https://docs.napatech.com/reader/Uv567tRMiPssSRRWlhc_3A/Y_KXPO0Zr093XtARORd3PQ