본사가 덴마크에 있으며, 2003년 시작한 회사입니다. FPGA 기반의 제품을 전세계에 15년 동안 공급하고 있으며, 일반 표준 서버에서 연산 집약적인 애플리케이션을 가속화하는 하이테크 솔루션을 기반 기술로 하는 회사입니다. 2013년 노르웨이 오슬로 증권거래소(NAPA.OL)에 상장된 회사입니다.
네트워크 성능 모니터링, 테스트 및 측정, 보안 및 최적화된 제품으로 금융 서비스, 통신, 클라우드 및 데이터 센터 서비스, 전자 상거래 및 미디어, 인프라 및 방위, 기업 관리 및 보안과 같은 다양한 산업에서 사용되고 있습니다. 최근에는 가상화(Virtualization)에 특화된 제품들도 출시하기 시작하였습니다.
네트워크 가속기의 Napatech 제품 포트폴리오는 1,2 또는 4 포트를 통해서 1Gbps~100Gbps/s 속도를 지원합니다. 첫 번째 제품은 2003 년 12 월에 출시 된 가속기로, 10Gbps 네트워크 속도를 지원합니다. 2014 년 1 분기까지 약 40 가지 이상의 다양한 가속기 모델을 생산했습니다. 가장 중요한 기능은 패킷 손실이없는 상태로 모든 네트워크 데이터를 캡처하고 데이터를 전송하는 것입니다.
Napatech의 차별성
Napatech은 FPGA에 대한 Hardware 기술 뿐만 아니라 Hardware와 독립된 XILINX/INTEL에 적합한 FPGA Configuration Software라는 새로운 제품 또한 가지고 있습니다.
빠른 변화와 그에 대한 대처가 필요한 시점에서 FPGA Solution은 성장에 필요한 문제들을 해결해 줄 것입니다. 그에 Napatech에서 제공하고 FPGA Hardware와 Software는 이 시장에 가장 적합한 하나의 Solution이 될 것 입니다
사진=Napatech 제공
FPGA SmartNIC 시장은 2025년까지 1.4B 달러로 빠르게 증가될 것이고 Offload NIC 시장에서도 추가로 $ 1.7B의 시장을 형성할 것이라고 합니다. 이미 검증된 FPGA 기반의 제품과 기술을 가지고 있으며 높은 시장 진입 장벽을 가진 이 시장에서 우위를 유지한다는 것을 보면 제품에 대한 현재와 미래에 대한 리더십을 가진 회사라고 볼 수 있을거 같습니다. 기본 자사 제품에 추가로 3rd Party인 Xilinx/Intel에 대한 solution을 추가한 점은 더 많은 고객 확보에 좋은점이 아닐까 생각합니다.
출처 : Napatech DN-1207 문서 참조 * 한글번역본은 번역자료에 Napatech 디렉토리에서 확인 하시면 됩니다.
SOLUTION DESCRIPTION
Scaling TRex Traffic Generation Performance
Napatech Link™ Capture Software
Testing and validating network performance is of the utmost importance to network equipment manufacturers, operators and owners. In the past, the traditional approach to testing network performance was based on proprietary traffic generators. But while such solutions have indeed proved efficient for a long series of use cases, they either fall short or prove massively cost prohibitive when it comes to complex and realistic traffic generation.
To manage the cumulating density of functionalities and workloads, the industry now demands a testing regime that not only delivers outstanding performance – but also offers better scalability and drastic cost improvements.
TRex
TRex is an open source traffic generator developed specifically to address these shortcomings through an innovative and extendable software implementation. What differentiates TRex is its portability, cost, capacity and flexibility.
As for any other traffic generation solution, the ability for TRex to reliably generate packets at line rate across all packet sizes is paramount. Whether simply packet blasting or replaying PCAP files for testing, the ability to send traffic for small packets at the maximum speed is a prerequisite.
Traffic reception is also of critical importance. The ability to receive the generated traffic once it has traversed the Device Under Test (DUT) is the only way of measuring the effectiveness of the solution. If the traffic reception does not match the generation capabilities, testing is compromised as one cannot identify if it is the DUT that is dropping traffic or the test equipment itself.
Accelerated TRex performance
In addressing this challenge, Napatech has created a hardware acceleration solution, based on the Napatech Link™ Capture Software, that alleviates the load on the CPU and thereby greatly increases TRex performance.
Optimized for lossless transmit and receive, the solution demonstrates substantial performance advantages for TRex compared to a standard Network Interface Card (NIC):
• Up to 4x transmit performance improvement • Up to 16x receive performance improvement
Turning acceleration into value These performance advantages ultimately allow you to:
• Maximize your server performance by improving CPU utilization
• Minimize your TCO by reducing number of servers, thus optimizing rack space, power, cooling and operational expenses
• Diminish your time-to-resolution, thereby enabling greatly increased efficiency
TRex generates layer 4-7 traffic based on pre-processing and smart replay of real traffic templates. TRex amplifies both client and server-side traffic. When running on the Napatech SmartNIC with Link™ Capture Software, TRex can both generate and receive traffic at 2x40G line rate regardless of packet size. This enables scalability both of bandwidth and feature complexities, thus providing businesses a highperformance and massively cost-efficient alternative to proprietary traffic generators.
TRex Stateless functionality includes support for multiple streams, the ability to change any packet field and provides per stream statistics, latency and jitter. Advanced Stateful functionality includes support for emulating L7 traffic with fully-featured scalable TCP layer.
Test configuration
The outstanding improvements achieved with this solution were demonstrated by comparing TRex performance running on a Dell PowerEdge R740 with a standard 40G NIC card and the Napatech NT200 SmartNIC.
Key solution features
• Line rate network throughput for all packet sizes
• Lossless capture for perfect inspection and detection
• Onboard packet buffering during micro-burst or PCI Express bus congestion scenarios
• Advanced host memory buffer management for ultra-high CPU cache performance
• Packet classification, match/action filtering and zero-copy forwarding
• Intelligent and flexible load distribution to as many as 64 queues improving CPU cache performance by always delivering the same flows to the same cores
Napatech Link™ Capture Software
The stunning benchmarks for TRex were achieved by deploying Napatech’s Reconfigurable Computing Platform™, based on FPGA-based Link™ Capture Software and Napatech SmartNIC hardware.
Napatech’s Reconfigurable Computing Platform flexibly offloads, accelerates and secures open, standard, high-volume and low-cost server platforms allowing them to meet the performance requirements for networking, communications and cybersecurity applications.
TRex
TRex is an ideal example of the type of critical enterprise security application that can achieve better performance through hardware acceleration.
TRex is an open source, low cost, stateful and stateless traffic generator. Typical use cases include:
• Creating high scale benchmarks for stateful networking gear, e.g. firewalls, DPI, IPS and load balancers
• Simulating high scale DDOS attacks
• Performing high scale, flexible testing for switches
• Performing scale tests for huge numbers of clients/ servers for controller-based testing
• Performing EDVT and production tests
TRex can be compiled with native support for hardware acceleration based on Napatech hardware and software. Napatech linux driver, installation instructions and source are available at:
The latest Napatech DPDK readme file can be found at https://github.com/napatech/dpdk/blob/master/ntacc_readme.md The readme file contains information on how to compile Napatech DPDK and set up the Napatech driver for DPDK. * Napatech에서 제공중인 DPDK에 대한 Version, Configuration, 지원 범위에 대해서는 Github의 readme 파일에 내용이 있습니다.
Getting and compiling Napatech DPDK
Napatech DPDK can be downloaded or cloned from: https://github.com/napatech/dpdk/releases. The environment variable NAPATECH3_PATH must be set to the Napatech driver installation root before compiling DPDK. The default installation root is /opt/napatech3. * 본 문서에서는 Napatech Software Installation에 대해서는 생략합니다. Napatech Software Installation 관련해서는 Installation Guide를 참고하시기 바랍니다. ** DPDK 설치 전에 반드시 Napatech Software Package가 설치되어 있어야 합니다.
To run any DPDK application, the Linux kernel option hugepages must be enabled. Edit the file /etc/default/grub and change or add to the following line: * DPDK Application 사용을 위해서는 Kernel Option에서 Hugepages 를 반드시 사용하여야 합니다.
4x TRex Performance Increase for Tx & Rx Napatech Link™ Capture Software for Intel® PAC with Intel Arria® 10 GX FPGA
Testing and validating network performance is of the utmost importance to network equipment manufacturers, operators and owners. In the past, the traditional approach to testing network performance was based on proprietary traffic generators. But while such solutions have indeed proved efficient for a long series of use cases, they either fall short or prove massively cost prohibitive when it comes to complex and realistic traffic generation.
To manage the cumulating density of functionalities and workloads, the industry now demands a testing regime that not only delivers outstanding performance – but also offers better scalability and drastic cost improvements.
TRex
TRex is an open source traffic generator developed specifically to address these shortcomings through an innovative and extendable software implementation. What differentiates TRex is its portability, cost, capacity and flexibility.
As for any other traffic generation solution, the ability for TRex to reliably generate packets at line rate across all packet sizes is paramount. Whether simply packet blasting or replaying PCAP files for testing, the ability to send traffic for small packets at the maximum speed is a prerequisite.
Traffic reception is also of critical importance. The ability to receive the generated traffic once it has traversed the Device Under Test (DUT) is the only way of measuring the effectiveness of the solution. If the traffic reception does not match the generation capabilities, testing is compromised as one cannot identify if it is the DUT that is dropping traffic or the test equipment itself.
Accelerated
TRex performance In addressing this challenge, Napatech has created a hardware acceleration solution that greatly increases TRex performance. This has been achieved by making the Napatech Link™ Capture Software available as an Acceleration Stack for the Intel® Programmable Acceleration Card (PAC) with Intel Arria® 10 GX FPGA.
Optimized for lossless transmit and receive, the solution demonstrates substantial performance advantages for TRex compared to a standard Network Interface Card (NIC): • 2x traffic generation performance • 4x traffic reception performance
Turning acceleration into value
These performance advantages ultimately allow you to: • Maximize your server performance by improving CPU utilization • Minimize your TCO by reducing number of servers, thus optimizing rack space, power, cooling and operational expenses • Diminish your time-to-resolution, thereby enabling greatly increased efficiency
TRex generates layer 4-7 traffic based on pre-processing and smart replay of real traffic templates. TRex amplifies both client and server-side traffic. When running on the Intel PAC with Napatech Link™ Capture Software, TRex can both generate and receive traffic at 40G line rate regardless of packet size. This enables scalability both of bandwidth and feature complexities, thus providing businesses a highperformance and massively cost-efficient alternative to proprietary traffic generators.
TRex Stateless functionality includes support for multiple streams, the ability to change any packet field and provides per stream statistics, latency and jitter. Advanced Stateful functionality includes support for emulating L7 traffic with fully-featured scalable TCP layer.
Test configuration
The outstanding improvements achieved with this solution were demonstrated by comparing TRex performance running on a Dell PowerEdge R740 with a standard 40G NIC card and the Intel PAC. Test configuration: dual-socket Dell R740 with Intel® Xeon® Gold 6138 2.0 GHz, 128GB RAM running CentOS 7.5.
Key solution features
• Line rate network throughput for all packet sizes • Lossless capture for perfect inspection and detection • Onboard packet buffering during micro-burst or PCI Express bus congestion scenarios • Advanced host memory buffer management for ultra-high CPU cache performance • Packet classification, match/action filtering and zero-copy forwarding • Intelligent and flexible load distribution to as many as 64 queues improving CPU cache performance by always delivering the same flows to the same cores
Napatech Link™ Capture Software for Intel® PAC
The Intel® Programmable Acceleration Card (PAC) with Intel Arria® 10 GX FPGA is a PCIe-based FPGA accelerator card for data centers supporting both inline and lookaside acceleration.
As the leader in FPGA-based SmartNIC software and hardware, Napatech has made its Link™ Capture Software available as an Acceleration Stack for the Intel PAC.
Napatech’s Reconfigurable Computing Platform flexibly offloads, accelerates and secures open, standard, high-volume and low-cost server platforms allowing them to meet the performance requirements for networking, communications and cybersecurity applications.
TRex
TRex is an ideal example of the type of critical enterprise security application that can achieve better performance through hardware acceleration with the Intel PAC and Napatech dataplane software.
TRex is an open source, low cost, stateful and stateless traffic generator. Typical use cases include:
• Creating high scale benchmarks for stateful networking gear, e.g. firewalls, DPI, IPS and load balancers • Simulating high scale DDOS attacks • Performing high scale, flexible testing for switches • Performing scale tests for huge numbers of clients/ servers for controller-based testing • Performing EDVT and production tests
TRex can be compiled with native support for hardware acceleration based on the Intel hardware and Napatech software. Instructions specific to building TRex with support for Napatech are listed in the Installation Quick Guide available at the Napatech Documentation Portal.
Napatech SmartNICs은 아래 Time Sync. 연결 방법을 지원한다. Napatech Intel PAC의 경우 OS Time만 지원된다. [ Napatech SmartNICs ] Time Synchronization • IEEE 1588-2008 PTP V2 • PPS • OS time [ Napatech Intel PAC ] • OS time
Napatech Intel PAC의 경우 Multi-CPU Distribution에서 64개의 Rx Stream만을 지원하고 지원하고, Napatech SmartNICs의 경우 128개의 Rx Stream과 QPI Bypass, 4x10G Socket Load balancing 기능을 지원한다. [ Napatech SmartNICs ] Intelligent Multi-CPU Distribution • Configurable flow distribution over 128 Rx streams • QPI bypass for 2 x 100G performance solution • 4 x 10G socket load balancer [ Napatech Intel PAC ] Intelligent Multi-CPU Distribution • Configurable flow distribution over 64 Rx streams
In-Line 기능에 대해서는 Napatech SmartNICs만 지원한다. Napatech Intel PAC의 경우 Transmission기능이 지원되기는 하나 Host-based Transmission/Local Retransmission 기능만 지원한다.
[ Napatech SmartNICs ] In-Line Application Support • Supports multi-core processing with up to 128 Rx/Tx streams per SmartNIC • Zero copy transfer from Rx to Tx • Single bit flip to select packet discard or packet forward
Napatech Intel PAC의 경우 FPGA Temp. 및 software shutdown에 대한 monitoring만 지원된다.
[ Napatech SmartNICs ] MONITORING SENSORS Sensors on the Napatech SmartNICs provide extensive monitoring of: • PCB temperature level with alarm • FPGA temperature level with alarm and automatic shutdown • Temperature of critical components • Individual optical port temperature or light level with alarm • Voltage or current overrange with alarm • Cooling fan speed with alarm • Ethernet link status per port • Status and loss of time synchronization [ Napatech Intel PAC ] Sensors on the Intel® PAC A10 GX provide monitoring of FPGA temperature level with alarm and software shutdown
Napatech SmartNICs은 1G, 10G and 40G and 100G port speeds 를 지원하지만, Napatech Intel PAC의 경우 10G and 40G port speeds만을 지원한다.
With the acquisition of Altera, Intel® has enabled the Programmable Acceleration Card (PAC) with Intel® Arria® 10 GX FPGA. This new card allows FPGA developers to create AFU (Accelerator Functional Units) that can be deployed on the card and bring FPGA-based value-add to the application.
The OPAE framework
Intel has developed a framework SDK – the Open Programmable Acceleration Engine (OPAE) – that operates with terms like blue and green bitstreams, using the colors to describe the internals of the Intel FPGA. The blue bitstreams are FPGA functional blocks delivered by Intel to make the card work. It contains IO logic for all the surrounding peripherals like PCI, SDRAM, and QSFP+. The green bitstream is where the user code (AFU) is located. The blue bitstream abstracts the IO via standardized APIs enabling the green bitstream to be easily ported to new blue bitstreams on other HW platforms.
The OPAE framework strives to ensure that the developer of an AFU only needs to concern him/herself with the AFU specifics and not the bring-up of the entire FPGA. The server application layer of the OPAE contains a driver layer giving the user access to acquire the FPGA, reset the FPGA, read/write to the FPGA, etc., all via standardized functions. The OPAE framework also provides functions like memory allocate, which can be seen both by the FPGA and the CPU.
The Napatech firmware is a green bitstream that interfaces with the blue bitstream components and enables the Napatech driver suite to interact with the Napatech firmware as if it were Napatech hardware. Normally, Napatech applies both blue and green bitstreams on its own hardware, so using only the green bitstream has been challenging, yet successful.
PAC Hardware
The PAC hardware consists of:
·a QSFP+ enabling a single 40Gbps or 4x10Gbps (via breakout cables)
Napatech has a long history of creating its own SmartNICs, but with the collaboration between Intel and Napatech, it is now possible to buy an Intel FPGA based NIC and get Napatech software to run on this non-Napatech hardware. The Napatech software on the Intel hardware enables full 40Gbps zero packet loss RX/TX both on 4x10Gbps and 1x40Gbps. Besides zero packet loss, key Napatech features like deduplication, correlation key generation, flow matching, pattern match, etc. become available as does the highly flexible tuple matcher used for load distribution of traffic. Napatech has enabled the Intel card to work as a plug-n-play solution for several monitoring/security applications like Suricata, Snort, Bro as well as the TRex traffic generator which means that it is also integrated into DPDK when running the Napatech firmware.
Performance
With the Intel PAC running Napatech Software, Intel now has a hardware platform that can claim zero packet loss at 40Gbps, which to my knowledge has not previously been possible. We have been testing internally with both the PAC and Intel X710 – and only the PAC with Napatech Software can ensure zero packet loss. Running e.g. Suricata on X710, the packet loss starts to occur at ~ 1Gbps, but with the Intel PAC, it runs without loss at ~40Gbps.
Final thoughts
I see great potential for the PAC platform and OPAE going forward and look very much forward to seeing what use cases it will fulfill and how the platform will evolve. Hopefully the PAC will enable more FPGA business, both from a hardware and firmware perspective. I don’t think the current PAC is a one-fits-all platform, but it can be the catalyst to spin-off a general interest in FPGA and other form factor boards that all feature the OPAE to enable portability from an application point of view. And in the end, that is what matters: that the application is accelerated.
Intel’s next PAC with a Stratix 10 looks interesting and much more similar to the Napatech hardware products, so let’s see what the future brings.
* Napatech Virtualization SmartNIC과 관련된 Hardware 자료입니다.
SmartNICs for Reconfigurable Computing
NT200B01 2-PORT 2x100G PCIe GEN3
THE NAPATECH NFV SmartNIC
Consolidate your network functions virtualization (NFV) performance with high-end technology designed specifically for NFV. The Napatech NFV SmartNIC is a common hardware platform that supports multiple SmartNIC solutions for virtualized environments. Based on a Xilinx UltraSCALE FPGA, the NFV SmartNIC is production-ready and can be reconfigured on-the-fly to support specific SmartNIC functionality.
Supporting from 1G to 100G data rates, the NFV SmartNIC is a versatile and flexible platform that can be used in multiple network locations. The programmability and reconfigurability of FPGAs can be exploited to extend the lifetime of the NFV SmartNIC and server hardware by allowing capacity, features and capabilities to be extended in line with data growth and new industry standards and demands.
Specific SmartNIC solutions are delivered as FPGA images that can be downloaded to the NFV SmartNIC to support the given application.
FEATURE HIGHLIGHTS
• Supports multiple solutions on-the-fly The re-configurable FPGA technology allows multiple SmartNIC solutions to be deployed on-the-fly. • Supports multiple rates at various locations Designed to support multiple data rates including 8x10Gbps, 4x10Gbps, 8x25 Gbps, 2x40 Gbps, 2x50 Gbps and 2x100 Gbps. • Extends hardware lifetime and improves TCO Can be upgraded on-the-fly with increased capacity, functionality and capabilities. This extends the lifetime of your infrastructure, reducing capital expenditure needs and operational costs. • Enables centralized automation and management Facilitates centralized automation and management as it supports multiple virtual services, applications and functions using the same hardware platform.
NAPATECH-SmartNIC SOLUTIONS
Napatech SmartNIC solutions are designed specifically for virtual environments. Examples include:
• Open Virtual Switch (OVS) SmartNIC Solution Napatech OVS SmartNIC Solution enables full throughput data delivery to virtual functions with zero packet loss at high-speed, using only a single CPU core and without the need to bypass or fully offload the virtual switch to the NIC. • Hardware SmartNIC Solutions Napatech Hardware SmartNIC Solutions provide common data processing services, such as encryption and compression, that can operate at high data line rates using only a single CPU core.
SPECIFICATIONS
GENERAL FEATURES • Full line-rate processing for all frames from 64 bytes to 10,000 bytes - keep or discard erroneous frames • IEEE standard: IEEE 802.3 2x100 Gbps Ethernet support • Network interface: 2 × QSFP28 ports • Supported QSFP28 modules:100GBASE-SR4 and 100GBASE-LR4 • Data rate: 2x100 Gbps • Typical CPU load: < 5% • Time formats: PCAP-ns/-µs and UNIX 10 ns • Time stamp resolution: 1 ns • Pluggable options for IEEE 1588-2008 PTP and PPS time synchronization
SmartNIC SOFTWARE • Operating systems: Linux • Napatech API for high performance and advanced features • libpcap • SDK tools included in source code for debugging and prototyping and as application examples
SmartNIC HARDWARE • Bus type: 16-lane 8 GT/s PCIe Gen3* • 5 GB onboard DDR4 RAM • Flash: Support for two boot images • Built-in thermal protection • Physical dimensions: ½-length and low-profile PCIe • Weight excluding pluggable modules: • NT200B01: 455 g • MTBF according to UTE C 80-810: • NT200B01: TBD hours • Power consumption including 2 x QSFP28: • NT200B01: max 75 Watts * To enable the throughput of 16-lane PCIe Gen3, the COTS server must support PCIe bifurcation.
ENVIRONMENT FOR NT200B01 • Operating temperature: 0 °C to 45 °C (32 °F to 113 °F) • Operating humidity: 20% to 80% REGULATORY APPROVALS AND COMPLIANCES • Please contact Napatech for more information
* 2019-07-01 Napatech SmartNIC 제품군에 대한 내용입니다. 여기에 없는 제품은 아직 출시전이거나 단종된 제품으로 보시면 됩니다. 자세한 문의는 판매처로 문의하시기 바랍니다. 문서번역 카테고리에 보시면 한글 번역본도 있습니다.
Napatech LinkSmartNIC Hardware
for Reconfigurable Computing
In a world of Reconfigurable Computing it is the software that defines the use case functionality, but the wrong choice of hardware can seriously limit the overall benefits and reliability of the solution.
Napatech’s LinkTM SmartNICs are designed to meet all the standards of modern servers, and with a rapidly changing world of Data Center and hyperscale deployments in mind.
PEACE OF MIND
The first thing on everybody’s mind when selecting a hardware solution is the question of reliability. Software can be patched if faulty, but hardware needs a physical replacement. You need to get it right the first time!
When Napatech is designing hardware, reliability is first and foremost in everything we do. Our customers need solutions that will support their use cases without worry. Our long-term loyal customer base proves this point.
KEEP YOUR COOL
The power of FPGA technology is only available if you can harness the power, and that takes cooling! In simple terms: The more you can cool, the more power you can burn, and the more functionality you can run on your LinkTM SmartNIC. This translates into real economical benefits, as you can fit more compute power into server rack space with a good cooling solution.
Napatech designs LinkTM SmartNICs with both active and passive cooling. The actively cooled solutions provide a 100% self-contained cooling solution with NO requirements for a specific server airflow. This solution exhales the majority of dissipated energy outside the server through front plate cutouts. This means that customers have the freedom to choose server designs without worrying about cooling capacity. To meet telecom requirements, the passively cooled solutions are NEBS-compliant.
GOOD VIBRATIONS
Modern servers have quick release PCI fastening mechanisms that allow for easy change of LinkTM SmartNICs. Unfortunately, some of these designs are exposing PCI cards to vibration in
the slot during transportation. To make sure that the hardware survives this environment, Napatech hardware is designed to meet the highest standards.
STANDARDS OF EXCELLENCE
Understanding the in’s and out’s of modern servers starts with the standards, but continues into tackling the hard realities of compromises and exceptions made to fit a certain form factor or price point. The more the SmartNIC hardware adheres to established industry standards, the easier it will be for customers to integrate it in their solution.
Napatech is on the PCI-SIG integrators list as a testimony to Napatech’s efforts to make sure that our customers do not need to worry about the hardware, and can focus on their software solution.
LINK TO THE FUTURE
Napatech offers a whole range of FPGA software options for the LinkTM hardware, that address use cases within:
·Network Security
·Network Quality of Experience Assurance
·Network & Security Forensics
·Application Performance Management (APM)
·Network Test & Measurement
·Cyber Defense
·vSwitch Acceleration
·Virtual Network Monitoring
출처 : Napatech DN-0251_Product_Overview_Napatech_Link_SmartNIC_Hardware 문서
