Napatech SmartNICs은 아래 Time Sync. 연결 방법을 지원한다. Napatech Intel PAC의 경우 OS Time만 지원된다. [ Napatech SmartNICs ] Time Synchronization • IEEE 1588-2008 PTP V2 • PPS • OS time [ Napatech Intel PAC ] • OS time
Napatech Intel PAC의 경우 Multi-CPU Distribution에서 64개의 Rx Stream만을 지원하고 지원하고, Napatech SmartNICs의 경우 128개의 Rx Stream과 QPI Bypass, 4x10G Socket Load balancing 기능을 지원한다. [ Napatech SmartNICs ] Intelligent Multi-CPU Distribution • Configurable flow distribution over 128 Rx streams • QPI bypass for 2 x 100G performance solution • 4 x 10G socket load balancer [ Napatech Intel PAC ] Intelligent Multi-CPU Distribution • Configurable flow distribution over 64 Rx streams
In-Line 기능에 대해서는 Napatech SmartNICs만 지원한다. Napatech Intel PAC의 경우 Transmission기능이 지원되기는 하나 Host-based Transmission/Local Retransmission 기능만 지원한다.
[ Napatech SmartNICs ] In-Line Application Support • Supports multi-core processing with up to 128 Rx/Tx streams per SmartNIC • Zero copy transfer from Rx to Tx • Single bit flip to select packet discard or packet forward
Napatech Intel PAC의 경우 FPGA Temp. 및 software shutdown에 대한 monitoring만 지원된다.
[ Napatech SmartNICs ] MONITORING SENSORS Sensors on the Napatech SmartNICs provide extensive monitoring of: • PCB temperature level with alarm • FPGA temperature level with alarm and automatic shutdown • Temperature of critical components • Individual optical port temperature or light level with alarm • Voltage or current overrange with alarm • Cooling fan speed with alarm • Ethernet link status per port • Status and loss of time synchronization [ Napatech Intel PAC ] Sensors on the Intel® PAC A10 GX provide monitoring of FPGA temperature level with alarm and software shutdown
Napatech SmartNICs은 1G, 10G and 40G and 100G port speeds 를 지원하지만, Napatech Intel PAC의 경우 10G and 40G port speeds만을 지원한다.
With the acquisition of Altera, Intel® has enabled the Programmable Acceleration Card (PAC) with Intel® Arria® 10 GX FPGA. This new card allows FPGA developers to create AFU (Accelerator Functional Units) that can be deployed on the card and bring FPGA-based value-add to the application.
The OPAE framework
Intel has developed a framework SDK – the Open Programmable Acceleration Engine (OPAE) – that operates with terms like blue and green bitstreams, using the colors to describe the internals of the Intel FPGA. The blue bitstreams are FPGA functional blocks delivered by Intel to make the card work. It contains IO logic for all the surrounding peripherals like PCI, SDRAM, and QSFP+. The green bitstream is where the user code (AFU) is located. The blue bitstream abstracts the IO via standardized APIs enabling the green bitstream to be easily ported to new blue bitstreams on other HW platforms.
The OPAE framework strives to ensure that the developer of an AFU only needs to concern him/herself with the AFU specifics and not the bring-up of the entire FPGA. The server application layer of the OPAE contains a driver layer giving the user access to acquire the FPGA, reset the FPGA, read/write to the FPGA, etc., all via standardized functions. The OPAE framework also provides functions like memory allocate, which can be seen both by the FPGA and the CPU.
The Napatech firmware is a green bitstream that interfaces with the blue bitstream components and enables the Napatech driver suite to interact with the Napatech firmware as if it were Napatech hardware. Normally, Napatech applies both blue and green bitstreams on its own hardware, so using only the green bitstream has been challenging, yet successful.
PAC Hardware
The PAC hardware consists of:
·a QSFP+ enabling a single 40Gbps or 4x10Gbps (via breakout cables)
Napatech has a long history of creating its own SmartNICs, but with the collaboration between Intel and Napatech, it is now possible to buy an Intel FPGA based NIC and get Napatech software to run on this non-Napatech hardware. The Napatech software on the Intel hardware enables full 40Gbps zero packet loss RX/TX both on 4x10Gbps and 1x40Gbps. Besides zero packet loss, key Napatech features like deduplication, correlation key generation, flow matching, pattern match, etc. become available as does the highly flexible tuple matcher used for load distribution of traffic. Napatech has enabled the Intel card to work as a plug-n-play solution for several monitoring/security applications like Suricata, Snort, Bro as well as the TRex traffic generator which means that it is also integrated into DPDK when running the Napatech firmware.
Performance
With the Intel PAC running Napatech Software, Intel now has a hardware platform that can claim zero packet loss at 40Gbps, which to my knowledge has not previously been possible. We have been testing internally with both the PAC and Intel X710 – and only the PAC with Napatech Software can ensure zero packet loss. Running e.g. Suricata on X710, the packet loss starts to occur at ~ 1Gbps, but with the Intel PAC, it runs without loss at ~40Gbps.
Final thoughts
I see great potential for the PAC platform and OPAE going forward and look very much forward to seeing what use cases it will fulfill and how the platform will evolve. Hopefully the PAC will enable more FPGA business, both from a hardware and firmware perspective. I don’t think the current PAC is a one-fits-all platform, but it can be the catalyst to spin-off a general interest in FPGA and other form factor boards that all feature the OPAE to enable portability from an application point of view. And in the end, that is what matters: that the application is accelerated.
Intel’s next PAC with a Stratix 10 looks interesting and much more similar to the Napatech hardware products, so let’s see what the future brings.
* Napatech Virtualization SmartNIC과 관련된 Hardware 자료입니다.
SmartNICs for Reconfigurable Computing
NT200B01 2-PORT 2x100G PCIe GEN3
THE NAPATECH NFV SmartNIC
Consolidate your network functions virtualization (NFV) performance with high-end technology designed specifically for NFV. The Napatech NFV SmartNIC is a common hardware platform that supports multiple SmartNIC solutions for virtualized environments. Based on a Xilinx UltraSCALE FPGA, the NFV SmartNIC is production-ready and can be reconfigured on-the-fly to support specific SmartNIC functionality.
Supporting from 1G to 100G data rates, the NFV SmartNIC is a versatile and flexible platform that can be used in multiple network locations. The programmability and reconfigurability of FPGAs can be exploited to extend the lifetime of the NFV SmartNIC and server hardware by allowing capacity, features and capabilities to be extended in line with data growth and new industry standards and demands.
Specific SmartNIC solutions are delivered as FPGA images that can be downloaded to the NFV SmartNIC to support the given application.
FEATURE HIGHLIGHTS
• Supports multiple solutions on-the-fly The re-configurable FPGA technology allows multiple SmartNIC solutions to be deployed on-the-fly. • Supports multiple rates at various locations Designed to support multiple data rates including 8x10Gbps, 4x10Gbps, 8x25 Gbps, 2x40 Gbps, 2x50 Gbps and 2x100 Gbps. • Extends hardware lifetime and improves TCO Can be upgraded on-the-fly with increased capacity, functionality and capabilities. This extends the lifetime of your infrastructure, reducing capital expenditure needs and operational costs. • Enables centralized automation and management Facilitates centralized automation and management as it supports multiple virtual services, applications and functions using the same hardware platform.
NAPATECH-SmartNIC SOLUTIONS
Napatech SmartNIC solutions are designed specifically for virtual environments. Examples include:
• Open Virtual Switch (OVS) SmartNIC Solution Napatech OVS SmartNIC Solution enables full throughput data delivery to virtual functions with zero packet loss at high-speed, using only a single CPU core and without the need to bypass or fully offload the virtual switch to the NIC. • Hardware SmartNIC Solutions Napatech Hardware SmartNIC Solutions provide common data processing services, such as encryption and compression, that can operate at high data line rates using only a single CPU core.
SPECIFICATIONS
GENERAL FEATURES • Full line-rate processing for all frames from 64 bytes to 10,000 bytes - keep or discard erroneous frames • IEEE standard: IEEE 802.3 2x100 Gbps Ethernet support • Network interface: 2 × QSFP28 ports • Supported QSFP28 modules:100GBASE-SR4 and 100GBASE-LR4 • Data rate: 2x100 Gbps • Typical CPU load: < 5% • Time formats: PCAP-ns/-µs and UNIX 10 ns • Time stamp resolution: 1 ns • Pluggable options for IEEE 1588-2008 PTP and PPS time synchronization
SmartNIC SOFTWARE • Operating systems: Linux • Napatech API for high performance and advanced features • libpcap • SDK tools included in source code for debugging and prototyping and as application examples
SmartNIC HARDWARE • Bus type: 16-lane 8 GT/s PCIe Gen3* • 5 GB onboard DDR4 RAM • Flash: Support for two boot images • Built-in thermal protection • Physical dimensions: ½-length and low-profile PCIe • Weight excluding pluggable modules: • NT200B01: 455 g • MTBF according to UTE C 80-810: • NT200B01: TBD hours • Power consumption including 2 x QSFP28: • NT200B01: max 75 Watts * To enable the throughput of 16-lane PCIe Gen3, the COTS server must support PCIe bifurcation.
ENVIRONMENT FOR NT200B01 • Operating temperature: 0 °C to 45 °C (32 °F to 113 °F) • Operating humidity: 20% to 80% REGULATORY APPROVALS AND COMPLIANCES • Please contact Napatech for more information
* 2019-07-01 Napatech SmartNIC 제품군에 대한 내용입니다. 여기에 없는 제품은 아직 출시전이거나 단종된 제품으로 보시면 됩니다. 자세한 문의는 판매처로 문의하시기 바랍니다. 문서번역 카테고리에 보시면 한글 번역본도 있습니다.
Napatech LinkSmartNIC Hardware
for Reconfigurable Computing
In a world of Reconfigurable Computing it is the software that defines the use case functionality, but the wrong choice of hardware can seriously limit the overall benefits and reliability of the solution.
Napatech’s LinkTM SmartNICs are designed to meet all the standards of modern servers, and with a rapidly changing world of Data Center and hyperscale deployments in mind.
PEACE OF MIND
The first thing on everybody’s mind when selecting a hardware solution is the question of reliability. Software can be patched if faulty, but hardware needs a physical replacement. You need to get it right the first time!
When Napatech is designing hardware, reliability is first and foremost in everything we do. Our customers need solutions that will support their use cases without worry. Our long-term loyal customer base proves this point.
KEEP YOUR COOL
The power of FPGA technology is only available if you can harness the power, and that takes cooling! In simple terms: The more you can cool, the more power you can burn, and the more functionality you can run on your LinkTM SmartNIC. This translates into real economical benefits, as you can fit more compute power into server rack space with a good cooling solution.
Napatech designs LinkTM SmartNICs with both active and passive cooling. The actively cooled solutions provide a 100% self-contained cooling solution with NO requirements for a specific server airflow. This solution exhales the majority of dissipated energy outside the server through front plate cutouts. This means that customers have the freedom to choose server designs without worrying about cooling capacity. To meet telecom requirements, the passively cooled solutions are NEBS-compliant.
GOOD VIBRATIONS
Modern servers have quick release PCI fastening mechanisms that allow for easy change of LinkTM SmartNICs. Unfortunately, some of these designs are exposing PCI cards to vibration in
the slot during transportation. To make sure that the hardware survives this environment, Napatech hardware is designed to meet the highest standards.
STANDARDS OF EXCELLENCE
Understanding the in’s and out’s of modern servers starts with the standards, but continues into tackling the hard realities of compromises and exceptions made to fit a certain form factor or price point. The more the SmartNIC hardware adheres to established industry standards, the easier it will be for customers to integrate it in their solution.
Napatech is on the PCI-SIG integrators list as a testimony to Napatech’s efforts to make sure that our customers do not need to worry about the hardware, and can focus on their software solution.
LINK TO THE FUTURE
Napatech offers a whole range of FPGA software options for the LinkTM hardware, that address use cases within:
·Network Security
·Network Quality of Experience Assurance
·Network & Security Forensics
·Application Performance Management (APM)
·Network Test & Measurement
·Cyber Defense
·vSwitch Acceleration
·Virtual Network Monitoring
출처 : Napatech DN-0251_Product_Overview_Napatech_Link_SmartNIC_Hardware 문서
